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[Other resource] SPI_verilogHDL

Description: 本原码是基于Verilog HDL语言编写的，实现了SPI接口设计，可以应用于FPGA,实现SPI协议的接口设计.在MAXII编译成功,用Modelsim SE 6仿真成功.-primitive code is based on Verilog HDL language, and achieving the SPI interface design, FPGA can be used to achieve agreement SPI interface design. MAXII success in the compiler, Modelsim SE with six successful simulation.
Platform: | Size: 1731 | Author: jevidyang | Hits:

[VHDL-FPGA-Verilog] SPI_verilogHDL

Description: 本原码是基于Verilog HDL语言编写的，实现了SPI接口设计，可以应用于FPGA,实现SPI协议的接口设计.在MAXII编译成功,用Modelsim SE 6仿真成功.-primitive code is based on Verilog HDL language, and achieving the SPI interface design, FPGA can be used to achieve agreement SPI interface design. MAXII success in the compiler, Modelsim SE with six successful simulation.
Platform: | Size: 1024 | Author: jevidyang | Hits:

[MPI] SPI-PRT

Description: 昨天在论坛上看到有人帖出了他写的并串转换VHDL代码，但是他自己说有问题，但是不知道怎么改。我大概看了一下，发现思路还是比较乱的。于是就写下了我自己的并串转换代码。-yesterday at the forum see someone points out his writing and string conversion VHDL code, But he said there are problems, but does not know how reform. I probably watched and found ideas is quite a mess. So I wrote on their own code and string conversion.
Platform: | Size: 1024 | Author: ZHAOBOO | Hits:

[VHDL-FPGA-Verilog] an487_design_example

Description: 用verlog hdl开发的SPI 的源码-Verlog hdl use the source code developed by SPI
Platform: | Size: 603136 | Author: zhiqiang | Hits:

[VHDL-FPGA-Verilog] spi

Description: 一篇比较好的spi接口的vhdl实现的参考-A relatively good spi interface realize VHDL reference
Platform: | Size: 18432 | Author: 杨子树 | Hits:

[VHDL-FPGA-Verilog] SPI_verilog_mycode

Description: 基于Verilog HDL的SPI代码，可在FPGA上实现SPI接口，请大家参考-Verilog HDL based on the SPI code, implementation in FPGA on SPI interface, please refer to
Platform: | Size: 1024 | Author: treefan.liang | Hits:

[VHDL-FPGA-Verilog] SPI_verilog_vhdl

Description: spi接口的VHDL和Verilog-HDL源码-VHDL and Verilog-HDL code for spi
Platform: | Size: 13312 | Author: 张文 | Hits:

[VHDL-FPGA-Verilog] Altera-memory

Description: 这个软件是altera 芯片对SPIflash的一个控制程序，里面读写测试已经通过。-spi flash code for VHDL
Platform: | Size: 125952 | Author: 周明 | Hits:

[VHDL-FPGA-Verilog] spi

Description: SPI verilog HDL语言编写的模块化代码，在EP1C12Q240C8in芯片平台，调试过。接口便于调用。-SPI verilog HDL language writing of the modular code, in EP1C12Q240C8in chip platform, a debugging. Interface easy to call.
Platform: | Size: 8192 | Author: 金伟 | Hits:

[File Format] spigpio_latest.tar

Description: SPI TO GPIO CODE HDL-SPI TO GPIO CODE HDL
Platform: | Size: 2048 | Author: huanying05 | Hits:

[Other] xapp800

Description: XAPP800SPICPLD源码参考设计-THIS DESIGN IS PROVIDED TO YOU AS IS . XILINX MAKES AND YOU RECEIVE NO WARRANTIES OR CONDITIONS, EXPRESS, IMPLIED, STATUTORY OR OTHERWISE, AND XILINX SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR A PARTICULAR PURPOSE. This design should be used only as an example design, not as a fully functional core. XILINX does not warrant the performance, functionality, or operation of this Design will meet your requirements, or that the operation of the Design will be uninterrupted or error free, or that defects in the Design will be corrected. Furthermore, XILINX does not warrant or make any representations regarding use or the results of the use of the Design in terms of correctness, accuracy, reliability or otherwise. THIRD PARTIES INCLUDING MOTOROLA MAY HAVE PATENTS ON THE SERIAL PERIPHERAL INTERFACE ( SPI ) BUS. BY PROVIDING THIS HDL CODE AS ONE POSSIBLE IMPLEMENTATION OF THIS STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THE PR
Platform: | Size: 396288 | Author: 杜维忠 | Hits:

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